Design a Divide by Counter Using 74163 Chips

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how to manually clock a 74163 IC?

Discussion in 'General Electronics Discussion' started by dustin02rsx, May 18, 2011.

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1. Hey guys, im working on a project where i want be able to manually clock and manually clear a 74163 synchronous binary counter.

   My problem is, every switch i use, i have to press a lot to even get a reading, then when i get a reading its not always accurate. it will count 1-2-3-12... and so on. I am not using the load feature.

   I have built several circuits using this IC in class on the trainer that uses a "pulser" switch to clock. I believe the "pulser" switch is a momentary toggle switch. I do not know if it is N.O. or N.C. or how it is hard wired in the trainer. Furthermore i have built many circuits like this on an altera board and used a pushbutton as a clock.

   I cannot get this circuit to work correctly on my breadboard at home and dont know why! Its summer break and i really dont want to bother my professor

   I have tried a momentary N.O. pushbutton, a tact switch and a regular toggle switch with no luck. Here is my wiring. Any advice to get this working would be extremely helpful!

   

2. You need to debounce your switches. Google will help you

   If you don't understand what you find, feel free to ask more questions.

3. You have the CLK input switched to 5V, is that correct? The inputs I have seen sit high and need to be pulled low. Look on the data sheets.

4. So according to this link i need a 7414 and a resistor and capacitor.

   http://www.all-electric.com/schematic/debounce.htm

   Do i need to do this for both switches?
   and what would be the best size cap and resistor in your opinion? i want it to charge as fast as possible but still work.

   I get input both ways, pulling it low gives me a highly inconsistent reading every time, whereas pulling it high gives me a more accurate reading (still not perfect) but i have to press the button a lot to even get a reading. Its positive edge triggered so i just assumed i'd pull it high to trigger the clock.

   Either way it wont be hard to fix once i get it to where its getting a clean input from the switch

5. For the theory on switch debouncing, try http://www.labbookpages.co.uk/electronics/debounce.html. Every case is different, so you'll have to design your own switch debouncer. It's easy.
   You're going to change the operating characteristics of a switch that'll be pushed by a human being. Let's say the HB can push his little button 10 times in a second, just like George Jetson.
   Then we can say that each switch operation needs to be completely over and done with in 100ms. OK? Now you can guess at a time constant for the RC network to debounce the switch. Remember that after 5 time constants a RC circuit has settled down completely. How about having the circuit settle in 20ms? Might be a go? We hope so, we haven't tested the switch with a 'scope.
   20ms/5=4ms. So the time constant in seconds (T) is given by RC=resistance multiplied by capacitance. T = 4ms = 4 x 10^(-3)vseconds.
   Pick the resistor for low current usage. (There's no good reason a timing circuit should get hot.) Let's start with 100kilohms. 100kilohms = 100 x 10^3 Ohms.
   T = R*C so C = T/R
   T/R= (4 x 10-3 )/(100 x 10^3) = 40 x 10^(-9). This number represents capacitance in farads: 40nF, or 40 nanofarads.
   Now, if you go back to that page on the link I included at the beginning of the post, you'll have something practical to try. Use 100k for each of the resistors in the Schmitt trigger circuit. Any small diode such as a 1N914 will do. Try a few smaller and larger values for the resistor and capacitor.

6. If you're dealing with CMOS, you can generally use high value resistors with gay abandon. If you are using TTL (which your part number implies, but which I suspect may be somewhat inaccurate) you will need to take into account the input currents.

   TTL will weakly pull high so that a disconnected input seems to be at logic 1 (although its noise immunity is minimal).

   CMOS needs to be pulled high or low and should not be left open.

   If you think about it, the only inputs that require debouncing are those for which multiple triggering will cause aberrant behaviour. Consider the clear function -- if you do that more than once, is it a problem?

   Clock inputs on many logic chips like to have clean, fast rise and fall times. Consider this aspect when you look at the alternative methods of debouncing.

   If you're using CMOS, the schmitt trigger inverter is a very versatile device and you will find circuits using it.

7. im not sure which debouncer circuit i want/ need.
   I'd like to use the least amount of parts possible, but i want to make sure i know exactly what i need before i order any more parts because its a 10 dollar minimum order and 7 minimum ship so multiple orders will get pricey They are ttl parts, sorry, i thought i put that somewhere.
   I get what you are saying about the clear because it doesnt matter how many times i clear its the same result. Where im getting problems is i have to press the button 1-10 times before it finally clears. I dont understand why.

9. update on my project and more questions lol.

   i got my parts in today. i could not get the debounce to work with a 7414, resistor and cap, however i ordered a debounce IC ($4.15 an ic but im not trying to make money so i guess thats ok.). I am now getting a clean count 0-16 with my debounce IC.
   so thank you all so much for that debouncing advice, it must be built in to the trainer at school.

   so the new problem is:
   i am using a 74LS163 full binary syncronous counter. i think i may have needed the asyncronous one because when i go to clear, i have to be pressing the button i am using to clock at the same time for it to clear. I guess this is not THAT big of a deal to me, but for my device to be more user friendly, i'd like it to clear when you press clear only. Is this possible with my IC? i realize im counting by manipulating the clock with my pushbutton so im thinking its not possible with the counter IC im using but advice would be appreciated.

11. Dustin, I recently (last week) built that exact debounce cct for the input of a 3 digit counter.
    it works really well. I used a 0.1uF cap and a 6k8 resistor

    cheers
    Dave

    Last edited: Jun 14, 2011

12. OK, firstly, you seem to be mixing 74LS TTL (the 74LS163) with TTL (7414) and 4000 series CMOS (4514).

    You're going to have to understand how one can drive the other if you don't stick to a single logic family.

    A 4514 is a 4 line to 16 line decoder and it's not going to make driving the LED display easy (you could do it, but you'd require a dozen transistors and possibly 50 diodes).

    You want a binary (or BCD) to 7 segment decoder/driver.

    And then your problem is that if you want 0 to 12, that requires 2 digits and a decoder to do that is not gong to be trivial. You need to consider a pair of decade counters (or BCD counters) rather than a binary counter.

    Take a look at the 74C926 and see what I mean about it being easier You can still get them on ebay for a couple of dollars. You'll still need debouncing, maybe your existing debouncer can be used.

    As you can see, changing from 4 binary digits to a pair of 7 segment displays can play havoc with your design.

    Your application could pretty much be done entirely with a 74C926 -- it's obsolete now, but you can still pick them up. It has the counter and the 7 segment decoder (up to 4 digits) in 1 package.

    What is the debounce device you purchased?

    The datasheet on the display seems perfectly fine to me. What is the problem that you see?

    A 74LS161 has asynchronous reset.

    edit: that seems to have come out in a very mixed up order. I'm sure you'll be able to figure it out.

    Last edited: Jun 14, 2011

13. i used a 10uF and a 1k ohm resistor, idk if i even put it on the breadboard right, as soon as it didnt work the first try i threw the debouncer IC on with a 1k ohm resistor and it works fine. i may try the debouncing with a cap again just because the cost of the IC.

    this is the debouncing IC i got, it works really well.
    https://www.jameco.com/webapp/wcs/s...cJ5l/xP&ddkey=https:StoreCatalogDrillDownView

    yeah i guess i am mixing them up. i was wondering why the data sheet was unclear as to where the 4 decoded bits 16 outputs went on the dual 7 seg display.

    ok here is a couple other parts i have on hand, please let me know if i can use any of these to make my circuit at least count to 9 as i can set my 74ls163 to clear there. I would prefer being able to count to 16 but 9 will suffice until i learn more as i think i am crossing into territory that i have not yet learned about i.e. mixing ttl, cmos and 74ls.

    2- 7447 3 bit decoder
    https://www.jameco.com/webapp/wcs/stores/servlet/Product_10001_10001_50420_-1

    3- single 7 seg display
    https://www.jameco.com/webapp/wcs/s...40cviMe&ddkey=https:StoreCatalogDrillDownView

    i also have some pnp and npn transistors and some diodes (but not 50)
    steve would an asyncronous counter make a difference with my clearing issue?

    Last edited: Jun 14, 2011

14. This is a bcd to seven segment decoder. Look at what it does and you'll realise it's what you need.

    Then you need a BCD counter (remember it goes from 0 to 9 only). In LSTTL it is here.

    Here is a dual BCD counter.

    You need asynchronous reset, whether it's a synchronous counter or not is less of an issue.

15. Wow, $4.15 for an IC to debounce a switch! For about 1/4 of that you could get a PIC microcontroller that would replace all of your chips, debouncing the swiches, implementing the counter and decoding and driving the display without any additional components except resistors on each segment.

    Bob

16. haha, havent got there yet man. I only have one year of EE under my belt. Covering those next semester i believe. I just want a project to do over the summer and $4.15 IC's are cheaper than $3k turbo kits

    ive been working all week so i havent had time to mess with it, but looking at my notes i should be able to use a 7447 IC with the 74ls163 clearing at 9 (technically 10 since its syncronous). This wont fix my clearing issue but as long as i can get an accurate count on the 7 seg display i can move on to the next step.

    Last edited: Jun 18, 2011

17. update:

    I am now loading 0 at 9 on my 74ls163 so it is basically like i have a BCD counter. this works fine when reading in binary with leds. I am using my 74ls47 7 seg driver in conjunction with one of the two 7 seg displays on my dual 7 seg.

    the problem is i am not getting anything consistent on the 7 seg display. At first it just stayed at 0 and didnt change, then i unconnected the Common cathode (mine only has one) on my 7 seg and re connected and it counted all the way to 8 but then stopped. It didnt go to 9 or clear when i cleared the counter.

    5v doesnt seem to be enough to keep the leds in to read in binary at the same time i am using the 7 seg display so im not sure where the problem is. It works fine in binary and i dont have any problems until i try the 7 seg display.

    im at a loss as to what is wrong.
    here is my schematic of what i have. i am loading 0 that way i can still clear when i dont want to count to 9.
    

18. Check here. The 74LS47 requires a common anode display and resistors for the segments.

    It always pays to read the specs. The output is open collector, which means that the outputs have significant pull down capability, but no pull-up capability.

19. i saw that it was supposed to have resistors, but i just figured i was over powering the display a little. Is that really the problem?

    I completely for got what open collector means, i saw the specs and saw open collector but didnt think to look into it. thanks again for the advice steve. ill let you know if it works when i mess with it again

20. ok guys, the resistor was the problem on that step lol.

    i have a cmos sram ic, and im curious if i can use it with the rest of my ttl parts?

    im wanting to put another 74ls163 to address the memory, im wanting 9 different locations, therefore i need 4 bits (0-8). My ic is an 8bit ic, im assuming i can just ground the other 4 bits im not using and it will still work fine for my application as long as i can use this ic with my ttl parts.

    here is the cmos sram.

    i have not actually tried it yet as i have been busy, but when i pulled up the part specs i saw it was CMOS so idk if it will even work.

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Design a Divide by Counter Using 74163 Chips

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